The present invention relates to memory devices, and more specifically, to writing methods for memory devices. Solid state or flash memory devices may include single level cell (SLC) regions and multi-level cell (MLC) regions. The memory devices may be arranged in blocks with a plurality of pages included in each block.
In a typical write operation, a write request is received and a processor determines which region will receive the data. A write buffer stores the data until there is at least a full page size of data that may then be transferred to the pages of the memory device.
Though the pages of a particular memory device are typically the same size, individual pages may not have the same robustness to errors due to a variety of factors. For example, pages may become less reliable over time, since some memory devices degrade due to multiple reading and writing operations. In SLC flash memories, pages may be erased and written approximately 100,000 times. In MLC flash memories, pages may be erased and written approximately 10,000 times or less. Thus, flash memories typically have low endurance. The reliability of pages may be also influenced by, for example, temperature and humidity.
Pages are often partitioned into two regions: a data region that stores user data; and an overhead region that stores metadata and parity bits for correcting data errors using an error-correction coding (ECC) scheme.